Automated Certified Neural Networks via CEGIS Loop

Researchers Matteo Zavatteri, Davide Bresolin, and Nicolò Navarin published their paper “Certified Neural Networks: from Verification to Synthesis” in the Journal of Artificial Intelligence Research on September 17 2026. The work addresses a long‑standing gap between formal verification—used to prove whether an existing network satisfies a property—and design correction, which verification alone cannot provide when a model fails to meet its constraints.¹

Neural networks are increasingly deployed in safety‑critical domains such as autonomous vehicles, medical devices, and industrial control systems. In these contexts it is essential to know not only that a trained network behaves correctly but also that it will never recommend catastrophic actions for any inputs. Formal verification can confirm compliance with logical specifications, yet it offers no mechanism for repairing or improving a non‑compliant model.¹

To close this loop, the authors propose an automated synthesis framework based on Counter Example Guided Inductive Synthesis (CEGIS). Their method iteratively alternates three phases: deep learning, where candidate networks are trained; formal verification, which checks whether the current network meets all required properties; and data generation, which augments the training set using counterexamples identified by the verifier. This cycle continues until either a certified model emerges or termination conditions fail.¹

The authors identify a few conditions ensuring that the CEGIS process terminates in a finite number of steps. They investigate a soft constraint acceleration technique designed to reduce iteration counts by relaxing certain constraints during early stages while preserving final correctness guarantees. The approach was